[Lf] Frequency standards for LF. The next generation]

Andre Kesteloot andre.kesteloot at ieee.org
Mon Jan 28 15:46:17 CST 2002


Talbot Andrew wrote:

> Looking at frequency standards for LF, the requirements are slightly
> different than for the higher frequencies.  For microwaves, where
> instantaneous frequency (over a few seconds) needs to be very good to avoid
> chirp on SSB or CW, a high stability oscillator has to be used as part of
> the Phase Locked Loop, locked to a master reference source.  The master
> source can be off air such as Droitwich or TV Sync pulses in which case loop
> bandwidths can be made wide enough that lockup to a few parts in 10^-9 is
> possible in minutes.  Both these are very good in the short term, but may
> have glitches or anomalies if relied on for hours at a time.   Another
> standard in use is that by Brooks Shera that locks a high quality VCXO to
> 1PPS from a GPS receiver - requiring hours to lock up and a very good VCXO.
> In all cases long term accuracy is that of the standard used - typically
> parts in 10^-10 or better.  Designs for all these have appeared in Amateur
> publications over the last few years.
>
> For LF, however, particularly where we are integrating over many seconds
> worth of data, the requirement for short term stability goes away, provided
> this period is significantly shorter than the signalling interval; long term
> stability is now even more important.  So the requirement for the high
> stability VCXO has gone, and all we need is a locking scheme that can
> maintain phase to within a few degrees over a few seconds, and in the long
> term remain perfectly locked to the master reference without cycle slippage.
>
> Here a GPS receiver really excells itself.  Rather than try to phase lock an
> oscilltor at a 1Hz reference frequency which would lead to inordinately long
> lockup times, I have used a frequency locked loop, based very roughly on the
> old Huff & Puff stabiliser published in the 1970s.  A sort of H & P
> stabiliser Mark 3.
>
> The idea is this :
>
> A VCXO runs at any frequency that is an exact multiple of 1Hz (I use
> 4.194304MHz ).  This directly clocks an 8 bit synchronous counter made up of
> 74HC161 chips.  The outputs of this are connected to an 8 bit latch,
> 74HC374, and the 1 Pulse per Second signal from a GPS receiver module
> latches the count once per second.  The latch outputs then contain the
> counter contents, updated very second.  For frequencies that are an exact
> multiple of 256Hz, the reading should therefore not change.  For frequencies
> that are not an exact multiple of 256, the count will increment each second
> by (Frequency MOD 2565).  If the frequency deviates slightly from its
> correct value, the count will increment each second by 1 for every 1Hz in
> error.  By not resetting the counter, as is done in normal frequency
> counters, the effect is more of a phase detector than a frequency counter as
> any error leads to a cumulatively increasing count.
>
> A PIC interrupted by the 1 PPS signal then reads this latched figure, and
> calculates the error from a nominal mid value of 128.   Using a PIC here
> allows a calculation to be made for any frequency, not just a multiple of
> 256Hz.   The direction and magnitude of the error count is then used to
> drive a charge pump, which in turn drives the varicap diode of the VCXO.
> The effect is to keep the VCXO precisely locked in the long term to the GPS
> signal, although in the short term it's instantaneous phase is jittering,
> and therefore the frequency is shifting by a Hz or two every second.  By
> apropriate choice of charge pump R/C values, the jitter can be minimised.
> When this source is subsequently divided down to LF, the phase shift is
> reduced by the division factor.   The PIC includes an initiallisation
> routine to force the charge pump to a mid voltage, which is close to that
> needed for zero frequency error, so the loop can lock up in less than five
> minutes.  In comparison, a conventional PLL with 1Hz reference would needs
> over 20 minutes even if the capacitor can be precharged AND the two pulse
> edges forced into synchronisation by allowing the GPS to reset the divider.
>
> Results so far are encouraging.  The residual phase blip when divided down
> from 4.194..MHz to 137kHz is about 10 - 20 degrees over a 1s period, and
> when averaged out over a typical 30s signalling period amounts to less than
> 1 degree overall.  Long term, when compared locally to other frequency
> standards available(Caesium, Droitwich, TV Sync) there is no overall phase
> shift of the 137kHz signal visible after many hours of monitoring, other
> than the propagation effects of the latter two standards themselves.
>
> A GPS receiver may seem an extravagance, but its value for LF signalling
> will be immense !  As well as providing the ultimate long term accuracy for
> frequency, by timing PSK signalling to GPS pulses as well, the requirement
> for data clock recovery is removed, so gaining many potential dB's in S/N
> capability.  By defining the starting phase as being at particular time,
> even the requirement for differential coding has gone, immediately giving a
> factor of two reduction in error rate and removing the threshold effect wrt.
> S/N seen with differential coding.
>
> A GPS receiver also makes an ideal instrument for general purpose frequency
> measurements (use it to drive a frequency counter) and a time standard as
> well as giving your location !
>
> For anyone who wants to have a go and duplicate the design, I will supply a
> copy of the circuit, a PCB layout and the PIC software on request.  There
> may be a bit of a delay however,  as the design was only 'frozen' this
> weekend and easy-to-read documentation is almost non existant at the moment
> !  TAPR still market the Garmin GPS25 receiver module as far as I know, see
> their web at www.tapr.org
>
> (4.194304 MHz was used as it allows a DDS to generate any frequency that is
> an exact multiple of 1 Hz without any rounding errors.  Which is not the
> case for 5 or 10MHz references !)
>
> Andy  G4JNT




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